EVB71101
315/433MHz Receiver
Evaluation Board Description
1.3
Block Diagram
1
2
3
4
5
6
7
8
9
10
11
12
13
21
14
15
16
IN_LNA
31
LNA
MIX1
IF
MIX2
IF
IFA
MIX3
OUTP
23
OUTN
24
LO
OAP
OA
20
OAN
19
DIV_16
PFD
RO
BIAS
OUT_OA
18
VCO1
CP
32
30
29 LF
26 RO
25
27
28
22
17
Fig. 1: TH71101 block diagram
1.4
Mode Configurations
ENRX
0
1
Mode
RX standby
RX active
Description
RX disabled
RX enable
Note: ENRX are pulled down internally
1.5
LNA GAIN Control
V GAIN_LNA
< 0.8 V
> 1.4 V
Mode
HIGH GAIN
LOW GAIN
Description
LNA set to high gain
LNA set to low gain
Note: hysteresis between gain modes to ensure stability
1.6
Frequency Planning
Frequency planning is straightforward for single-conversion applications because there is only one IF that
can be chosen, and then the only possible choice is low-side or high-side injection of the LO signal (which is
now the one and only LO signal in the receiver).
The receiver’s single-conversion architecture requires careful frequency planning. Besides the desired RF
input signal, there are a number of spurious signals that may cause an undesired response at the output.
Among them is the image of the RF signal that must be suppressed by the RF front-end filter.
39012 71101 01
Rev. 012
Page 4 of 14
EVB Description
April/08
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